nrf52840_pac/spi0/
frequency.rs
1#[doc = "Register `FREQUENCY` reader"]
2pub struct R(crate::R<FREQUENCY_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<FREQUENCY_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<FREQUENCY_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<FREQUENCY_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `FREQUENCY` writer"]
17pub struct W(crate::W<FREQUENCY_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<FREQUENCY_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<FREQUENCY_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<FREQUENCY_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `FREQUENCY` reader - SPI master data rate"]
38pub type FREQUENCY_R = crate::FieldReader<u32, FREQUENCY_A>;
39#[doc = "SPI master data rate\n\nValue on reset: 67108864"]
40#[derive(Clone, Copy, Debug, PartialEq)]
41#[repr(u32)]
42pub enum FREQUENCY_A {
43 #[doc = "33554432: 125 kbps"]
44 K125 = 33554432,
45 #[doc = "67108864: 250 kbps"]
46 K250 = 67108864,
47 #[doc = "134217728: 500 kbps"]
48 K500 = 134217728,
49 #[doc = "268435456: 1 Mbps"]
50 M1 = 268435456,
51 #[doc = "536870912: 2 Mbps"]
52 M2 = 536870912,
53 #[doc = "1073741824: 4 Mbps"]
54 M4 = 1073741824,
55 #[doc = "2147483648: 8 Mbps"]
56 M8 = 2147483648,
57}
58impl From<FREQUENCY_A> for u32 {
59 #[inline(always)]
60 fn from(variant: FREQUENCY_A) -> Self {
61 variant as _
62 }
63}
64impl FREQUENCY_R {
65 #[doc = "Get enumerated values variant"]
66 #[inline(always)]
67 pub fn variant(&self) -> Option<FREQUENCY_A> {
68 match self.bits {
69 33554432 => Some(FREQUENCY_A::K125),
70 67108864 => Some(FREQUENCY_A::K250),
71 134217728 => Some(FREQUENCY_A::K500),
72 268435456 => Some(FREQUENCY_A::M1),
73 536870912 => Some(FREQUENCY_A::M2),
74 1073741824 => Some(FREQUENCY_A::M4),
75 2147483648 => Some(FREQUENCY_A::M8),
76 _ => None,
77 }
78 }
79 #[doc = "Checks if the value of the field is `K125`"]
80 #[inline(always)]
81 pub fn is_k125(&self) -> bool {
82 *self == FREQUENCY_A::K125
83 }
84 #[doc = "Checks if the value of the field is `K250`"]
85 #[inline(always)]
86 pub fn is_k250(&self) -> bool {
87 *self == FREQUENCY_A::K250
88 }
89 #[doc = "Checks if the value of the field is `K500`"]
90 #[inline(always)]
91 pub fn is_k500(&self) -> bool {
92 *self == FREQUENCY_A::K500
93 }
94 #[doc = "Checks if the value of the field is `M1`"]
95 #[inline(always)]
96 pub fn is_m1(&self) -> bool {
97 *self == FREQUENCY_A::M1
98 }
99 #[doc = "Checks if the value of the field is `M2`"]
100 #[inline(always)]
101 pub fn is_m2(&self) -> bool {
102 *self == FREQUENCY_A::M2
103 }
104 #[doc = "Checks if the value of the field is `M4`"]
105 #[inline(always)]
106 pub fn is_m4(&self) -> bool {
107 *self == FREQUENCY_A::M4
108 }
109 #[doc = "Checks if the value of the field is `M8`"]
110 #[inline(always)]
111 pub fn is_m8(&self) -> bool {
112 *self == FREQUENCY_A::M8
113 }
114}
115#[doc = "Field `FREQUENCY` writer - SPI master data rate"]
116pub type FREQUENCY_W<'a, const O: u8> =
117 crate::FieldWriter<'a, u32, FREQUENCY_SPEC, u32, FREQUENCY_A, 32, O>;
118impl<'a, const O: u8> FREQUENCY_W<'a, O> {
119 #[doc = "125 kbps"]
120 #[inline(always)]
121 pub fn k125(self) -> &'a mut W {
122 self.variant(FREQUENCY_A::K125)
123 }
124 #[doc = "250 kbps"]
125 #[inline(always)]
126 pub fn k250(self) -> &'a mut W {
127 self.variant(FREQUENCY_A::K250)
128 }
129 #[doc = "500 kbps"]
130 #[inline(always)]
131 pub fn k500(self) -> &'a mut W {
132 self.variant(FREQUENCY_A::K500)
133 }
134 #[doc = "1 Mbps"]
135 #[inline(always)]
136 pub fn m1(self) -> &'a mut W {
137 self.variant(FREQUENCY_A::M1)
138 }
139 #[doc = "2 Mbps"]
140 #[inline(always)]
141 pub fn m2(self) -> &'a mut W {
142 self.variant(FREQUENCY_A::M2)
143 }
144 #[doc = "4 Mbps"]
145 #[inline(always)]
146 pub fn m4(self) -> &'a mut W {
147 self.variant(FREQUENCY_A::M4)
148 }
149 #[doc = "8 Mbps"]
150 #[inline(always)]
151 pub fn m8(self) -> &'a mut W {
152 self.variant(FREQUENCY_A::M8)
153 }
154}
155impl R {
156 #[doc = "Bits 0:31 - SPI master data rate"]
157 #[inline(always)]
158 pub fn frequency(&self) -> FREQUENCY_R {
159 FREQUENCY_R::new(self.bits)
160 }
161}
162impl W {
163 #[doc = "Bits 0:31 - SPI master data rate"]
164 #[inline(always)]
165 pub fn frequency(&mut self) -> FREQUENCY_W<0> {
166 FREQUENCY_W::new(self)
167 }
168 #[doc = "Writes raw bits to the register."]
169 #[inline(always)]
170 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
171 self.0.bits(bits);
172 self
173 }
174}
175#[doc = "SPI frequency. Accuracy depends on the HFCLK source selected.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [frequency](index.html) module"]
176pub struct FREQUENCY_SPEC;
177impl crate::RegisterSpec for FREQUENCY_SPEC {
178 type Ux = u32;
179}
180#[doc = "`read()` method returns [frequency::R](R) reader structure"]
181impl crate::Readable for FREQUENCY_SPEC {
182 type Reader = R;
183}
184#[doc = "`write(|w| ..)` method takes [frequency::W](W) writer structure"]
185impl crate::Writable for FREQUENCY_SPEC {
186 type Writer = W;
187}
188#[doc = "`reset()` method sets FREQUENCY to value 0x0400_0000"]
189impl crate::Resettable for FREQUENCY_SPEC {
190 #[inline(always)]
191 fn reset_value() -> Self::Ux {
192 0x0400_0000
193 }
194}