rp2040_pac/rosc/
ctrl.rs

1#[doc = "Register `CTRL` reader"]
2pub type R = crate::R<CTRL_SPEC>;
3#[doc = "Register `CTRL` writer"]
4pub type W = crate::W<CTRL_SPEC>;
5#[doc = "Field `FREQ_RANGE` reader - Controls the number of delay stages in the ROSC ring  
6 LOW uses stages 0 to 7  
7 MEDIUM uses stages 0 to 5  
8 HIGH uses stages 0 to 3  
9 TOOHIGH uses stages 0 to 1 and should not be used because its frequency exceeds design specifications  
10 The clock output will not glitch when changing the range up one step at a time  
11 The clock output will glitch when changing the range down  
12 Note: the values here are gray coded which is why HIGH comes before TOOHIGH"]
13pub type FREQ_RANGE_R = crate::FieldReader<FREQ_RANGE_A>;
14#[doc = "Controls the number of delay stages in the ROSC ring  
15 LOW uses stages 0 to 7  
16 MEDIUM uses stages 0 to 5  
17 HIGH uses stages 0 to 3  
18 TOOHIGH uses stages 0 to 1 and should not be used because its frequency exceeds design specifications  
19 The clock output will not glitch when changing the range up one step at a time  
20 The clock output will glitch when changing the range down  
21 Note: the values here are gray coded which is why HIGH comes before TOOHIGH  
22
23Value on reset: 2720"]
24#[derive(Clone, Copy, Debug, PartialEq, Eq)]
25#[repr(u16)]
26pub enum FREQ_RANGE_A {
27    #[doc = "4004: `111110100100`"]
28    LOW = 4004,
29    #[doc = "4005: `111110100101`"]
30    MEDIUM = 4005,
31    #[doc = "4007: `111110100111`"]
32    HIGH = 4007,
33    #[doc = "4006: `111110100110`"]
34    TOOHIGH = 4006,
35}
36impl From<FREQ_RANGE_A> for u16 {
37    #[inline(always)]
38    fn from(variant: FREQ_RANGE_A) -> Self {
39        variant as _
40    }
41}
42impl crate::FieldSpec for FREQ_RANGE_A {
43    type Ux = u16;
44}
45impl FREQ_RANGE_R {
46    #[doc = "Get enumerated values variant"]
47    #[inline(always)]
48    pub const fn variant(&self) -> Option<FREQ_RANGE_A> {
49        match self.bits {
50            4004 => Some(FREQ_RANGE_A::LOW),
51            4005 => Some(FREQ_RANGE_A::MEDIUM),
52            4007 => Some(FREQ_RANGE_A::HIGH),
53            4006 => Some(FREQ_RANGE_A::TOOHIGH),
54            _ => None,
55        }
56    }
57    #[doc = "`111110100100`"]
58    #[inline(always)]
59    pub fn is_low(&self) -> bool {
60        *self == FREQ_RANGE_A::LOW
61    }
62    #[doc = "`111110100101`"]
63    #[inline(always)]
64    pub fn is_medium(&self) -> bool {
65        *self == FREQ_RANGE_A::MEDIUM
66    }
67    #[doc = "`111110100111`"]
68    #[inline(always)]
69    pub fn is_high(&self) -> bool {
70        *self == FREQ_RANGE_A::HIGH
71    }
72    #[doc = "`111110100110`"]
73    #[inline(always)]
74    pub fn is_toohigh(&self) -> bool {
75        *self == FREQ_RANGE_A::TOOHIGH
76    }
77}
78#[doc = "Field `FREQ_RANGE` writer - Controls the number of delay stages in the ROSC ring  
79 LOW uses stages 0 to 7  
80 MEDIUM uses stages 0 to 5  
81 HIGH uses stages 0 to 3  
82 TOOHIGH uses stages 0 to 1 and should not be used because its frequency exceeds design specifications  
83 The clock output will not glitch when changing the range up one step at a time  
84 The clock output will glitch when changing the range down  
85 Note: the values here are gray coded which is why HIGH comes before TOOHIGH"]
86pub type FREQ_RANGE_W<'a, REG> = crate::FieldWriter<'a, REG, 12, FREQ_RANGE_A>;
87impl<'a, REG> FREQ_RANGE_W<'a, REG>
88where
89    REG: crate::Writable + crate::RegisterSpec,
90    REG::Ux: From<u16>,
91{
92    #[doc = "`111110100100`"]
93    #[inline(always)]
94    pub fn low(self) -> &'a mut crate::W<REG> {
95        self.variant(FREQ_RANGE_A::LOW)
96    }
97    #[doc = "`111110100101`"]
98    #[inline(always)]
99    pub fn medium(self) -> &'a mut crate::W<REG> {
100        self.variant(FREQ_RANGE_A::MEDIUM)
101    }
102    #[doc = "`111110100111`"]
103    #[inline(always)]
104    pub fn high(self) -> &'a mut crate::W<REG> {
105        self.variant(FREQ_RANGE_A::HIGH)
106    }
107    #[doc = "`111110100110`"]
108    #[inline(always)]
109    pub fn toohigh(self) -> &'a mut crate::W<REG> {
110        self.variant(FREQ_RANGE_A::TOOHIGH)
111    }
112}
113#[doc = "Field `ENABLE` reader - On power-up this field is initialised to ENABLE  
114 The system clock must be switched to another source before setting this field to DISABLE otherwise the chip will lock up  
115 The 12-bit code is intended to give some protection against accidental writes. An invalid setting will enable the oscillator."]
116pub type ENABLE_R = crate::FieldReader<ENABLE_A>;
117#[doc = "On power-up this field is initialised to ENABLE  
118 The system clock must be switched to another source before setting this field to DISABLE otherwise the chip will lock up  
119 The 12-bit code is intended to give some protection against accidental writes. An invalid setting will enable the oscillator.  
120
121Value on reset: 0"]
122#[derive(Clone, Copy, Debug, PartialEq, Eq)]
123#[repr(u16)]
124pub enum ENABLE_A {
125    #[doc = "3358: `110100011110`"]
126    DISABLE = 3358,
127    #[doc = "4011: `111110101011`"]
128    ENABLE = 4011,
129}
130impl From<ENABLE_A> for u16 {
131    #[inline(always)]
132    fn from(variant: ENABLE_A) -> Self {
133        variant as _
134    }
135}
136impl crate::FieldSpec for ENABLE_A {
137    type Ux = u16;
138}
139impl ENABLE_R {
140    #[doc = "Get enumerated values variant"]
141    #[inline(always)]
142    pub const fn variant(&self) -> Option<ENABLE_A> {
143        match self.bits {
144            3358 => Some(ENABLE_A::DISABLE),
145            4011 => Some(ENABLE_A::ENABLE),
146            _ => None,
147        }
148    }
149    #[doc = "`110100011110`"]
150    #[inline(always)]
151    pub fn is_disable(&self) -> bool {
152        *self == ENABLE_A::DISABLE
153    }
154    #[doc = "`111110101011`"]
155    #[inline(always)]
156    pub fn is_enable(&self) -> bool {
157        *self == ENABLE_A::ENABLE
158    }
159}
160#[doc = "Field `ENABLE` writer - On power-up this field is initialised to ENABLE  
161 The system clock must be switched to another source before setting this field to DISABLE otherwise the chip will lock up  
162 The 12-bit code is intended to give some protection against accidental writes. An invalid setting will enable the oscillator."]
163pub type ENABLE_W<'a, REG> = crate::FieldWriter<'a, REG, 12, ENABLE_A>;
164impl<'a, REG> ENABLE_W<'a, REG>
165where
166    REG: crate::Writable + crate::RegisterSpec,
167    REG::Ux: From<u16>,
168{
169    #[doc = "`110100011110`"]
170    #[inline(always)]
171    pub fn disable(self) -> &'a mut crate::W<REG> {
172        self.variant(ENABLE_A::DISABLE)
173    }
174    #[doc = "`111110101011`"]
175    #[inline(always)]
176    pub fn enable(self) -> &'a mut crate::W<REG> {
177        self.variant(ENABLE_A::ENABLE)
178    }
179}
180impl R {
181    #[doc = "Bits 0:11 - Controls the number of delay stages in the ROSC ring  
182 LOW uses stages 0 to 7  
183 MEDIUM uses stages 0 to 5  
184 HIGH uses stages 0 to 3  
185 TOOHIGH uses stages 0 to 1 and should not be used because its frequency exceeds design specifications  
186 The clock output will not glitch when changing the range up one step at a time  
187 The clock output will glitch when changing the range down  
188 Note: the values here are gray coded which is why HIGH comes before TOOHIGH"]
189    #[inline(always)]
190    pub fn freq_range(&self) -> FREQ_RANGE_R {
191        FREQ_RANGE_R::new((self.bits & 0x0fff) as u16)
192    }
193    #[doc = "Bits 12:23 - On power-up this field is initialised to ENABLE  
194 The system clock must be switched to another source before setting this field to DISABLE otherwise the chip will lock up  
195 The 12-bit code is intended to give some protection against accidental writes. An invalid setting will enable the oscillator."]
196    #[inline(always)]
197    pub fn enable(&self) -> ENABLE_R {
198        ENABLE_R::new(((self.bits >> 12) & 0x0fff) as u16)
199    }
200}
201impl W {
202    #[doc = "Bits 0:11 - Controls the number of delay stages in the ROSC ring  
203 LOW uses stages 0 to 7  
204 MEDIUM uses stages 0 to 5  
205 HIGH uses stages 0 to 3  
206 TOOHIGH uses stages 0 to 1 and should not be used because its frequency exceeds design specifications  
207 The clock output will not glitch when changing the range up one step at a time  
208 The clock output will glitch when changing the range down  
209 Note: the values here are gray coded which is why HIGH comes before TOOHIGH"]
210    #[inline(always)]
211    #[must_use]
212    pub fn freq_range(&mut self) -> FREQ_RANGE_W<CTRL_SPEC> {
213        FREQ_RANGE_W::new(self, 0)
214    }
215    #[doc = "Bits 12:23 - On power-up this field is initialised to ENABLE  
216 The system clock must be switched to another source before setting this field to DISABLE otherwise the chip will lock up  
217 The 12-bit code is intended to give some protection against accidental writes. An invalid setting will enable the oscillator."]
218    #[inline(always)]
219    #[must_use]
220    pub fn enable(&mut self) -> ENABLE_W<CTRL_SPEC> {
221        ENABLE_W::new(self, 12)
222    }
223    #[doc = r" Writes raw bits to the register."]
224    #[doc = r""]
225    #[doc = r" # Safety"]
226    #[doc = r""]
227    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
228    #[inline(always)]
229    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
230        self.bits = bits;
231        self
232    }
233}
234#[doc = "Ring Oscillator control  
235
236You can [`read`](crate::generic::Reg::read) this register and get [`ctrl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
237pub struct CTRL_SPEC;
238impl crate::RegisterSpec for CTRL_SPEC {
239    type Ux = u32;
240}
241#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"]
242impl crate::Readable for CTRL_SPEC {}
243#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"]
244impl crate::Writable for CTRL_SPEC {
245    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
246    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
247}
248#[doc = "`reset()` method sets CTRL to value 0x0aa0"]
249impl crate::Resettable for CTRL_SPEC {
250    const RESET_VALUE: u32 = 0x0aa0;
251}
rp2040_pac/rosc/ctrl.rs

rp2040_pac/rosc/
ctrl.rs
