Expand description
DMA Control Register
The register is used to enable the DMA Controller interface operation. There is a separate bit for transmit and receive. This can be programmed regardless of the state of IC_ENABLE.
Structs§
- IC_
DMA_ CR_ SPEC - DMA Control Register
Enums§
- RDMAE_A
- Receive DMA Enable. This bit enables/disables the receive FIFO DMA channel. Reset value: 0x0
- TDMAE_A
- Transmit DMA Enable. This bit enables/disables the transmit FIFO DMA channel. Reset value: 0x0
Type Aliases§
- R
- Register
IC_DMA_CR
reader - RDMAE_R
- Field
RDMAE
reader - Receive DMA Enable. This bit enables/disables the receive FIFO DMA channel. Reset value: 0x0 - RDMAE_W
- Field
RDMAE
writer - Receive DMA Enable. This bit enables/disables the receive FIFO DMA channel. Reset value: 0x0 - TDMAE_R
- Field
TDMAE
reader - Transmit DMA Enable. This bit enables/disables the transmit FIFO DMA channel. Reset value: 0x0 - TDMAE_W
- Field
TDMAE
writer - Transmit DMA Enable. This bit enables/disables the transmit FIFO DMA channel. Reset value: 0x0 - W
- Register
IC_DMA_CR
writer