Type Alias rp2040_pac::pll_sys::PRIM

pub type PRIM = Reg<PRIM_SPEC>;

PRIM (rw) register accessor: Controls the PLL post dividers for the primary output
(note: this PLL does not have a secondary output)
the primary output is driven from VCO divided by postdiv1*postdiv2

You can read this register and get prim::R. You can reset, write, write_with_zero this register using prim::W. You can also modify this register. See API.

For information about available fields see prim module

Aliased Type

struct PRIM { /* private fields */ }