Struct rp2040_pac::pll_sys::prim::PRIM_SPEC

pub struct PRIM_SPEC;

Controls the PLL post dividers for the primary output
(note: this PLL does not have a secondary output)
the primary output is driven from VCO divided by postdiv1*postdiv2

You can read this register and get prim::R. You can reset, write, write_with_zero this register using prim::W. You can also modify this register. See API.

Trait Implementations

impl RegisterSpec for PRIM_SPEC

type Ux = u32

Raw register type (u8, u16, u32, …).

impl Resettable for PRIM_SPEC

reset() method sets PRIM to value 0x0007_7000

const RESET_VALUE: u32 = 487_424u32

Reset value of the register.

fn reset_value() -> Self::Ux

Reset value of the register.

impl Writable for PRIM_SPEC

write(|w| ..) method takes prim::W writer structure

const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0u32

Specifies the register bits that are not changed if you pass 1 and are changed if you pass 0

const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0u32

Specifies the register bits that are not changed if you pass 0 and are changed if you pass 1

impl Readable for PRIM_SPEC

read() method returns prim::R reader structure