(note: this PLL does not have a secondary output)
the primary output is driven from VCO divided by postdiv1*postdiv2
You can read
this register and get prim::R
. You can reset
, write
, write_with_zero
this register using prim::W
. You can also modify
this register. See API.
reset()
method sets PRIM to value 0x0007_7000
write(|w| ..)
method takes prim::W
writer structure
1
and are changed if you pass 0
0
and are changed if you pass 1
read()
method returns prim::R
reader structure