A 32 bit saturating counter that increments upon each cache hit,
i.e. when an XIP access is serviced directly from cached data.
Write any value to clear.
You can read
this register and get ctr_hit::R
. You can reset
, write
, write_with_zero
this register using ctr_hit::W
. You can also modify
this register. See API.
For information about available fields see ctr_hit
module
struct CTR_HIT { /* private fields */ }