A 32 bit saturating counter that increments upon each XIP access,
whether the cache is hit or not. This includes noncacheable accesses.
Write any value to clear.
You can read
this register and get ctr_acc::R
. You can reset
, write
, write_with_zero
this register using ctr_acc::W
. You can also modify
this register. See API.
For information about available fields see ctr_acc
module
struct CTR_ACC { /* private fields */ }