Expand description
AHB Bus Control Register
Modules§
- Parallel mode enabled for AHB triggered Command (both read and write) .
- Enable AHB bus bufferable write access support. This field affects the last beat of AHB write access, refer for more details about AHB bufferable write.
- Enable AHB bus cachable read access support.
- Clear the status/pointers of AHB RX Buffer. Auto-cleared.
- Clear the status/pointers of AHB TX Buffer. Auto-cleared.
- AHB Read Prefetch Enable.
- AHB Read Address option bit. This option bit is intend to remove AHB burst start address alignment limitation.
- AHB Read Size Alignment