Struct imxrt_ral::flexspi::RegisterBlock

source · 
#[repr(C)]
pub struct RegisterBlock {
Show 34 fields
    pub MCR0: RWRegister<u32>,
    pub MCR1: RWRegister<u32>,
    pub MCR2: RWRegister<u32>,
    pub AHBCR: RWRegister<u32>,
    pub INTEN: RWRegister<u32>,
    pub INTR: RWRegister<u32>,
    pub LUTKEY: RWRegister<u32>,
    pub LUTCR: RWRegister<u32>,
    pub AHBRXBUF0CR0: RWRegister<u32>,
    pub AHBRXBUF1CR0: RWRegister<u32>,
    pub AHBRXBUF2CR0: RWRegister<u32>,
    pub AHBRXBUF3CR0: RWRegister<u32>,
    pub FLSHA1CR0: RWRegister<u32>,
    pub FLSHA2CR0: RWRegister<u32>,
    pub FLSHB1CR0: RWRegister<u32>,
    pub FLSHB2CR0: RWRegister<u32>,
    pub FLSHCR1: [RWRegister<u32>; 4],
    pub FLSHCR2: [RWRegister<u32>; 4],
    pub FLSHCR4: RWRegister<u32>,
    pub IPCR0: RWRegister<u32>,
    pub IPCR1: RWRegister<u32>,
    pub IPCMD: RWRegister<u32>,
    pub IPRXFCR: RWRegister<u32>,
    pub IPTXFCR: RWRegister<u32>,
    pub DLLCR: [RWRegister<u32>; 2],
    pub STS0: RORegister<u32>,
    pub STS1: RORegister<u32>,
    pub STS2: RORegister<u32>,
    pub AHBSPNDSTS: RORegister<u32>,
    pub IPRXFSTS: RORegister<u32>,
    pub IPTXFSTS: RORegister<u32>,
    pub RFDR: [RORegister<u32>; 32],
    pub TFDR: [WORegister<u32>; 32],
    pub LUT: [RWRegister<u32>; 64],
    /* private fields */

}
Expand description

FlexSPI

Fields§

§MCR0: RWRegister<u32>

Module Control Register 0

§MCR1: RWRegister<u32>

Module Control Register 1

§MCR2: RWRegister<u32>

Module Control Register 2

§AHBCR: RWRegister<u32>

AHB Bus Control Register

§INTEN: RWRegister<u32>

Interrupt Enable Register

§INTR: RWRegister<u32>

Interrupt Register

§LUTKEY: RWRegister<u32>

LUT Key Register

§LUTCR: RWRegister<u32>

LUT Control Register

§AHBRXBUF0CR0: RWRegister<u32>

AHB RX Buffer 0 Control Register 0

§AHBRXBUF1CR0: RWRegister<u32>

AHB RX Buffer 1 Control Register 0

§AHBRXBUF2CR0: RWRegister<u32>

AHB RX Buffer 2 Control Register 0

§AHBRXBUF3CR0: RWRegister<u32>

AHB RX Buffer 3 Control Register 0

§FLSHA1CR0: RWRegister<u32>

Flash Control Register 0

§FLSHA2CR0: RWRegister<u32>

Flash Control Register 0

§FLSHB1CR0: RWRegister<u32>

Flash Control Register 0

§FLSHB2CR0: RWRegister<u32>

Flash Control Register 0

§FLSHCR1: [RWRegister<u32>; 4]

Flash Control Register 1

§FLSHCR2: [RWRegister<u32>; 4]

Flash Control Register 2

§FLSHCR4: RWRegister<u32>

Flash Control Register 4

§IPCR0: RWRegister<u32>

IP Control Register 0

§IPCR1: RWRegister<u32>

IP Control Register 1

§IPCMD: RWRegister<u32>

IP Command Register

§IPRXFCR: RWRegister<u32>

IP RX FIFO Control Register

§IPTXFCR: RWRegister<u32>

IP TX FIFO Control Register

§DLLCR: [RWRegister<u32>; 2]

DLL Control Register 0

§STS0: RORegister<u32>

Status Register 0

§STS1: RORegister<u32>

Status Register 1

§STS2: RORegister<u32>

Status Register 2

§AHBSPNDSTS: RORegister<u32>

AHB Suspend Status Register

§IPRXFSTS: RORegister<u32>

IP RX FIFO Status Register

§IPTXFSTS: RORegister<u32>

IP TX FIFO Status Register

§RFDR: [RORegister<u32>; 32]

IP RX FIFO Data Register 0

§TFDR: [WORegister<u32>; 32]

IP TX FIFO Data Register 0

§LUT: [RWRegister<u32>; 64]

LUT 0

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