Struct rp2040_pac::xip_ctrl::stream_addr::STREAM_ADDR_SPEC

pub struct STREAM_ADDR_SPEC;

FIFO stream address

You can read this register and get stream_addr::R. You can reset, write, write_with_zero this register using stream_addr::W. You can also modify this register. See API.

Trait Implementations

impl RegisterSpec for STREAM_ADDR_SPEC

type Ux = u32

Raw register type (u8, u16, u32, …).

impl Resettable for STREAM_ADDR_SPEC

reset() method sets STREAM_ADDR to value 0

const RESET_VALUE: u32 = 0u32

Reset value of the register.

fn reset_value() -> Self::Ux

Reset value of the register.

impl Writable for STREAM_ADDR_SPEC

write(|w| ..) method takes stream_addr::W writer structure

const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0u32

Specifies the register bits that are not changed if you pass 1 and are changed if you pass 0

const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0u32

Specifies the register bits that are not changed if you pass 0 and are changed if you pass 1

impl Readable for STREAM_ADDR_SPEC

read() method returns stream_addr::R reader structure