Module interp0_ctrl_lane0

Control register for lane 0

Structs

INTERP0_CTRL_LANE0_SPEC

Control register for lane 0

Type Aliases

ADD_RAW_R

Field ADD_RAW reader - If 1, mask + shift is bypassed for LANE0 result. This does not affect FULL result.

ADD_RAW_W

Field ADD_RAW writer - If 1, mask + shift is bypassed for LANE0 result. This does not affect FULL result.

BLEND_R

Field BLEND reader - Only present on INTERP0 on each core. If BLEND mode is enabled:

BLEND_W

Field BLEND writer - Only present on INTERP0 on each core. If BLEND mode is enabled:

CROSS_INPUT_R

Field CROSS_INPUT reader - If 1, feed the opposite lane’s accumulator into this lane’s shift + mask hardware.
Takes effect even if ADD_RAW is set (the CROSS_INPUT mux is before the shift+mask bypass)

CROSS_INPUT_W

Field CROSS_INPUT writer - If 1, feed the opposite lane’s accumulator into this lane’s shift + mask hardware.
Takes effect even if ADD_RAW is set (the CROSS_INPUT mux is before the shift+mask bypass)

CROSS_RESULT_R

Field CROSS_RESULT reader - If 1, feed the opposite lane’s result into this lane’s accumulator on POP.

CROSS_RESULT_W

Field CROSS_RESULT writer - If 1, feed the opposite lane’s result into this lane’s accumulator on POP.

FORCE_MSB_R

Field FORCE_MSB reader - ORed into bits 29:28 of the lane result presented to the processor on the bus.
No effect on the internal 32-bit datapath. Handy for using a lane to generate sequence
of pointers into flash or SRAM.

FORCE_MSB_W

Field FORCE_MSB writer - ORed into bits 29:28 of the lane result presented to the processor on the bus.
No effect on the internal 32-bit datapath. Handy for using a lane to generate sequence
of pointers into flash or SRAM.

MASK_LSB_R

Field MASK_LSB reader - The least-significant bit allowed to pass by the mask (inclusive)

MASK_LSB_W

Field MASK_LSB writer - The least-significant bit allowed to pass by the mask (inclusive)

MASK_MSB_R

Field MASK_MSB reader - The most-significant bit allowed to pass by the mask (inclusive)
Setting MSB < LSB may cause chip to turn inside-out

MASK_MSB_W

Field MASK_MSB writer - The most-significant bit allowed to pass by the mask (inclusive)
Setting MSB < LSB may cause chip to turn inside-out

OVERF0_R

Field OVERF0 reader - Indicates if any masked-off MSBs in ACCUM0 are set.

OVERF1_R

Field OVERF1 reader - Indicates if any masked-off MSBs in ACCUM1 are set.

OVERF_R

Field OVERF reader - Set if either OVERF0 or OVERF1 is set.

R

Register INTERP0_CTRL_LANE0 reader

SHIFT_R

Field SHIFT reader - Logical right-shift applied to accumulator before masking

SHIFT_W

Field SHIFT writer - Logical right-shift applied to accumulator before masking

SIGNED_R

Field SIGNED reader - If SIGNED is set, the shifted and masked accumulator value is sign-extended to 32 bits
before adding to BASE0, and LANE0 PEEK/POP appear extended to 32 bits when read by processor.

SIGNED_W

Field SIGNED writer - If SIGNED is set, the shifted and masked accumulator value is sign-extended to 32 bits
before adding to BASE0, and LANE0 PEEK/POP appear extended to 32 bits when read by processor.

W

Register INTERP0_CTRL_LANE0 writer