Type Alias rp2040_pac::i2c0::ic_ss_scl_lcnt::R
source · pub type R = R<IC_SS_SCL_LCNT_SPEC>;
Expand description
Register IC_SS_SCL_LCNT
reader
Aliased Type§
struct R { /* private fields */ }
Implementations§
source§impl R
impl R
sourcepub fn ic_ss_scl_lcnt(&self) -> IC_SS_SCL_LCNT_R
pub fn ic_ss_scl_lcnt(&self) -> IC_SS_SCL_LCNT_R
Bits 0:15 - This register must be set before any I2C bus transaction can take place to ensure proper I/O timing. This register sets the SCL clock low period count for standard speed. For more information, refer to ‘IC_CLK Frequency Configuration’
This register can be written only when the I2C interface is disabled which corresponds to the IC_ENABLE[0] register being set to 0. Writes at other times have no effect.
The minimum valid value is 8; hardware prevents values less than this being written, and if attempted, results in 8 being set. For designs with APB_DATA_WIDTH = 8, the order of programming is important to ensure the correct operation of DW_apb_i2c. The lower byte must be programmed first, and then the upper byte is programmed.