Module rp2040_pac::adc::fcs

FIFO control and status

Structs

• FCS_SPEC
  FIFO control and status

Type Aliases

• DREQ_EN_R
  Field DREQ_EN reader - If 1: assert DMA requests when FIFO contains data
• DREQ_EN_W
  Field DREQ_EN writer - If 1: assert DMA requests when FIFO contains data
• EMPTY_R
  Field EMPTY reader -
• EN_R
  Field EN reader - If 1: write result to the FIFO after each conversion.
• EN_W
  Field EN writer - If 1: write result to the FIFO after each conversion.
• ERR_R
  Field ERR reader - If 1: conversion error bit appears in the FIFO alongside the result
• ERR_W
  Field ERR writer - If 1: conversion error bit appears in the FIFO alongside the result
• FULL_R
  Field FULL reader -
• LEVEL_R
  Field LEVEL reader - The number of conversion results currently waiting in the FIFO
• OVER_R
  Field OVER reader - 1 if the FIFO has been overflowed. Write 1 to clear.
• OVER_W
  Field OVER writer - 1 if the FIFO has been overflowed. Write 1 to clear.
• R
  Register FCS reader
• SHIFT_R
  Field SHIFT reader - If 1: FIFO results are right-shifted to be one byte in size. Enables DMA to byte buffers.
• SHIFT_W
  Field SHIFT writer - If 1: FIFO results are right-shifted to be one byte in size. Enables DMA to byte buffers.
• THRESH_R
  Field THRESH reader - DREQ/IRQ asserted when level >= threshold
• THRESH_W
  Field THRESH writer - DREQ/IRQ asserted when level >= threshold
• UNDER_R
  Field UNDER reader - 1 if the FIFO has been underflowed. Write 1 to clear.
• UNDER_W
  Field UNDER writer - 1 if the FIFO has been underflowed. Write 1 to clear.
• W
  Register FCS writer