Expand description
DCDC Register 1
Modules§
- LOOPCTRL_
EN_ HYST - Enable hysteresis in switching converter common mode analog comparators
- LOOPCTRL_
HST_ THRESH - increase the threshold detection for common mode analog comparator
- LP_
CMP_ ISRC_ SEL - set the current bias of low power comparator 0x0: 50 nA 0x1: 100 nA 0x2: 200 nA 0x3: 400 nA
- REG_
FBK_ SEL - select the feedback point of the internal regulator
- REG_
RLOAD_ SW - control the load resistor of the internal regulator of DCDC, the load resistor is connected as default “1”, and need set to “0” to disconnect the load resistor
- VBG_
TRIM - trim bandgap voltage