Type Alias rp2040_pac::usbctrl_dpram::epx_control::W

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pub type W = W<EPX_CONTROL_SPEC>;
Expand description

Register EPX_CONTROL writer

Aliased Type§

struct W { /* private fields */ }

Implementations§

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impl W

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pub fn buffer_address(&mut self) -> BUFFER_ADDRESS_W<'_, EPX_CONTROL_SPEC>

Bits 0:15 - 64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

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pub fn interrupt_on_nak(&mut self) -> INTERRUPT_ON_NAK_W<'_, EPX_CONTROL_SPEC>

Bit 16 - Trigger an interrupt if a NAK is sent. Intended for debug only.

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pub fn interrupt_on_stall( &mut self, ) -> INTERRUPT_ON_STALL_W<'_, EPX_CONTROL_SPEC>

Bit 17 - Trigger an interrupt if a STALL is sent. Intended for debug only.

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pub fn endpoint_type(&mut self) -> ENDPOINT_TYPE_W<'_, EPX_CONTROL_SPEC>

Bits 26:27

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pub fn interrupt_per_double_buff( &mut self, ) -> INTERRUPT_PER_DOUBLE_BUFF_W<'_, EPX_CONTROL_SPEC>

Bit 28 - Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

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pub fn interrupt_per_buff( &mut self, ) -> INTERRUPT_PER_BUFF_W<'_, EPX_CONTROL_SPEC>

Bit 29 - Trigger an interrupt each time a buffer is done.

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pub fn double_buffered(&mut self) -> DOUBLE_BUFFERED_W<'_, EPX_CONTROL_SPEC>

Bit 30 - This endpoint is double buffered.

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pub fn enable(&mut self) -> ENABLE_W<'_, EPX_CONTROL_SPEC>

Bit 31 - Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

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pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

§Safety

Passing incorrect value can cause undefined behaviour. See reference manual