Expand description
For each bit, if 1, bypass the input synchronizer between that GPIO
and the GPIO input register in the SIO. The input synchronizers should
generally be unbypassed, to avoid injecting metastabilities into processors.
If you’re feeling brave, you can bypass to save two cycles of input
latency. This register applies to GPIO 0…29.
Structs§
- PROC_
IN_ SYNC_ BYPASS_ SPEC - For each bit, if 1, bypass the input synchronizer between that GPIO
and the GPIO input register in the SIO. The input synchronizers should
generally be unbypassed, to avoid injecting metastabilities into processors.
If you’re feeling brave, you can bypass to save two cycles of input
latency. This register applies to GPIO 0…29.
Type Aliases§
- PROC_
IN_ SYNC_ BYPASS_ R - Field
PROC_IN_SYNC_BYPASS
reader - - PROC_
IN_ SYNC_ BYPASS_ W - Field
PROC_IN_SYNC_BYPASS
writer - - R
- Register
PROC_IN_SYNC_BYPASS
reader - W
- Register
PROC_IN_SYNC_BYPASS
writer