Module rp2040_pac::spi0::sspcpsr

Clock prescale register, SSPCPSR on page 3-8

Structs

• SSPCPSR_SPEC
  Clock prescale register, SSPCPSR on page 3-8

Type Aliases

• CPSDVSR_R
  Field CPSDVSR reader - Clock prescale divisor. Must be an even number from 2-254, depending on the frequency of SSPCLK. The least significant bit always returns zero on reads.
• CPSDVSR_W
  Field CPSDVSR writer - Clock prescale divisor. Must be an even number from 2-254, depending on the frequency of SSPCLK. The least significant bit always returns zero on reads.
• R
  Register SSPCPSR reader
• W
  Register SSPCPSR writer