Reading yields lane 0’s raw shift and mask value (BASE0 not added).
You can read
this register and get interp1_accum0_add::R
. You can reset
, write
, write_with_zero
this register using interp1_accum0_add::W
. You can also modify
this register. See API.
For information about available fields see interp1_accum0_add
module
struct INTERP1_ACCUM0_ADD { /* private fields */ }