Struct rp2040_pac::sio::interp1_accum0_add::INTERP1_ACCUM0_ADD_SPEC

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pub struct INTERP1_ACCUM0_ADD_SPEC;
Expand description

Values written here are atomically added to ACCUM0
Reading yields lane 0’s raw shift and mask value (BASE0 not added).

You can read this register and get interp1_accum0_add::R. You can reset, write, write_with_zero this register using interp1_accum0_add::W. You can also modify this register. See API.

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impl RegisterSpec for INTERP1_ACCUM0_ADD_SPEC

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type Ux = u32

Raw register type (u8, u16, u32, …).
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impl Resettable for INTERP1_ACCUM0_ADD_SPEC

reset() method sets INTERP1_ACCUM0_ADD to value 0

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const RESET_VALUE: u32 = 0u32

Reset value of the register.
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fn reset_value() -> Self::Ux

Reset value of the register.
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impl Writable for INTERP1_ACCUM0_ADD_SPEC

write(|w| ..) method takes interp1_accum0_add::W writer structure

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const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0u32

Specifies the register bits that are not changed if you pass 1 and are changed if you pass 0
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const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0u32

Specifies the register bits that are not changed if you pass 0 and are changed if you pass 1
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impl Readable for INTERP1_ACCUM0_ADD_SPEC

read() method returns interp1_accum0_add::R reader structure

Auto Trait Implementations§

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