Module rp2040_pac::sio::interp0_ctrl_lane1

Control register for lane 1

Structs

• INTERP0_CTRL_LANE1_SPEC
  Control register for lane 1

Type Aliases

• ADD_RAW_R
  Field ADD_RAW reader - If 1, mask + shift is bypassed for LANE1 result. This does not affect FULL result.
• ADD_RAW_W
  Field ADD_RAW writer - If 1, mask + shift is bypassed for LANE1 result. This does not affect FULL result.
• CROSS_INPUT_R
  Field CROSS_INPUT reader - If 1, feed the opposite lane’s accumulator into this lane’s shift + mask hardware.
  Takes effect even if ADD_RAW is set (the CROSS_INPUT mux is before the shift+mask bypass)
• CROSS_INPUT_W
  Field CROSS_INPUT writer - If 1, feed the opposite lane’s accumulator into this lane’s shift + mask hardware.
  Takes effect even if ADD_RAW is set (the CROSS_INPUT mux is before the shift+mask bypass)
• CROSS_RESULT_R
  Field CROSS_RESULT reader - If 1, feed the opposite lane’s result into this lane’s accumulator on POP.
• CROSS_RESULT_W
  Field CROSS_RESULT writer - If 1, feed the opposite lane’s result into this lane’s accumulator on POP.
• FORCE_MSB_R
  Field FORCE_MSB reader - ORed into bits 29:28 of the lane result presented to the processor on the bus.
  No effect on the internal 32-bit datapath. Handy for using a lane to generate sequence
  of pointers into flash or SRAM.
• FORCE_MSB_W
  Field FORCE_MSB writer - ORed into bits 29:28 of the lane result presented to the processor on the bus.
  No effect on the internal 32-bit datapath. Handy for using a lane to generate sequence
  of pointers into flash or SRAM.
• MASK_LSB_R
  Field MASK_LSB reader - The least-significant bit allowed to pass by the mask (inclusive)
• MASK_LSB_W
  Field MASK_LSB writer - The least-significant bit allowed to pass by the mask (inclusive)
• MASK_MSB_R
  Field MASK_MSB reader - The most-significant bit allowed to pass by the mask (inclusive)
  Setting MSB < LSB may cause chip to turn inside-out
• MASK_MSB_W
  Field MASK_MSB writer - The most-significant bit allowed to pass by the mask (inclusive)
  Setting MSB < LSB may cause chip to turn inside-out
• R
  Register INTERP0_CTRL_LANE1 reader
• SHIFT_R
  Field SHIFT reader - Logical right-shift applied to accumulator before masking
• SHIFT_W
  Field SHIFT writer - Logical right-shift applied to accumulator before masking
• SIGNED_R
  Field SIGNED reader - If SIGNED is set, the shifted and masked accumulator value is sign-extended to 32 bits
  before adding to BASE1, and LANE1 PEEK/POP appear extended to 32 bits when read by processor.
• SIGNED_W
  Field SIGNED writer - If SIGNED is set, the shifted and masked accumulator value is sign-extended to 32 bits
  before adding to BASE1, and LANE1 PEEK/POP appear extended to 32 bits when read by processor.
• W
  Register INTERP0_CTRL_LANE1 writer