Module ctrl

Ring Oscillator control

Structs

CTRL_SPEC

Ring Oscillator control

Enums

ENABLE_A

On power-up this field is initialised to ENABLE
The system clock must be switched to another source before setting this field to DISABLE otherwise the chip will lock up
The 12-bit code is intended to give some protection against accidental writes. An invalid setting will enable the oscillator.

FREQ_RANGE_A

Controls the number of delay stages in the ROSC ring
LOW uses stages 0 to 7
MEDIUM uses stages 0 to 5
HIGH uses stages 0 to 3
TOOHIGH uses stages 0 to 1 and should not be used because its frequency exceeds design specifications
The clock output will not glitch when changing the range up one step at a time
The clock output will glitch when changing the range down
Note: the values here are gray coded which is why HIGH comes before TOOHIGH

Type Aliases

ENABLE_R

Field ENABLE reader - On power-up this field is initialised to ENABLE
The system clock must be switched to another source before setting this field to DISABLE otherwise the chip will lock up
The 12-bit code is intended to give some protection against accidental writes. An invalid setting will enable the oscillator.

ENABLE_W

Field ENABLE writer - On power-up this field is initialised to ENABLE
The system clock must be switched to another source before setting this field to DISABLE otherwise the chip will lock up
The 12-bit code is intended to give some protection against accidental writes. An invalid setting will enable the oscillator.

FREQ_RANGE_R

Field FREQ_RANGE reader - Controls the number of delay stages in the ROSC ring
LOW uses stages 0 to 7
MEDIUM uses stages 0 to 5
HIGH uses stages 0 to 3
TOOHIGH uses stages 0 to 1 and should not be used because its frequency exceeds design specifications
The clock output will not glitch when changing the range up one step at a time
The clock output will glitch when changing the range down
Note: the values here are gray coded which is why HIGH comes before TOOHIGH

FREQ_RANGE_W

Field FREQ_RANGE writer - Controls the number of delay stages in the ROSC ring
LOW uses stages 0 to 7
MEDIUM uses stages 0 to 5
HIGH uses stages 0 to 3
TOOHIGH uses stages 0 to 1 and should not be used because its frequency exceeds design specifications
The clock output will not glitch when changing the range up one step at a time
The clock output will glitch when changing the range down
Note: the values here are gray coded which is why HIGH comes before TOOHIGH

R

Register CTRL reader

W

Register CTRL writer