Expand description
Cluster Cluster CH%s, containing CH*_CC, CH*_CSR, CH*_CTR, CH*_DIV, CH*_TOP
Modules§
- cc
- Counter compare values
- csr
- Control and status register
- ctr
- Direct access to the PWM counter
- div
- INT and FRAC form a fixed-point fractional number.
Counting rate is system clock frequency divided by this number.
Fractional division uses simple 1st-order sigma-delta. - top
- Counter wrap value
Structs§
- CH
- Register block
Type Aliases§
- CC
- CC (rw) register accessor: Counter compare values
- CSR
- CSR (rw) register accessor: Control and status register
- CTR
- CTR (rw) register accessor: Direct access to the PWM counter
- DIV
- DIV (rw) register accessor: INT and FRAC form a fixed-point fractional number.
Counting rate is system clock frequency divided by this number.
Fractional division uses simple 1st-order sigma-delta. - TOP
- TOP (rw) register accessor: Counter wrap value