Module rp2040_pac::pwm::ch::csr

Control and status register

Structs

• CSR_SPEC
  Control and status register

Enums

• DIVMODE_A
  Value on reset: 0

Type Aliases

• A_INV_R
  Field A_INV reader - Invert output A
• A_INV_W
  Field A_INV writer - Invert output A
• B_INV_R
  Field B_INV reader - Invert output B
• B_INV_W
  Field B_INV writer - Invert output B
• DIVMODE_R
  Field DIVMODE reader -
• DIVMODE_W
  Field DIVMODE writer -
• EN_R
  Field EN reader - Enable the PWM channel.
• EN_W
  Field EN writer - Enable the PWM channel.
• PH_ADV_R
  Field PH_ADV reader - Advance the phase of the counter by 1 count, while it is running.
  Self-clearing. Write a 1, and poll until low. Counter must be running
  at less than full speed (div_int + div_frac / 16 > 1)
• PH_ADV_W
  Field PH_ADV writer - Advance the phase of the counter by 1 count, while it is running.
  Self-clearing. Write a 1, and poll until low. Counter must be running
  at less than full speed (div_int + div_frac / 16 > 1)
• PH_CORRECT_R
  Field PH_CORRECT reader - 1: Enable phase-correct modulation. 0: Trailing-edge
• PH_CORRECT_W
  Field PH_CORRECT writer - 1: Enable phase-correct modulation. 0: Trailing-edge
• PH_RET_R
  Field PH_RET reader - Retard the phase of the counter by 1 count, while it is running.
  Self-clearing. Write a 1, and poll until low. Counter must be running.
• PH_RET_W
  Field PH_RET writer - Retard the phase of the counter by 1 count, while it is running.
  Self-clearing. Write a 1, and poll until low. Counter must be running.
• R
  Register CSR reader
• W
  Register CSR writer