Struct rp2040_pac::ppb::syst_rvr::SYST_RVR_SPEC

pub struct SYST_RVR_SPEC;

Use the SysTick Reload Value Register to specify the start value to load into the current value register when the counter reaches 0. It can be any value between 0 and 0x00FFFFFF. A start value of 0 is possible, but has no effect because the SysTick interrupt and COUNTFLAG are activated when counting from 1 to 0. The reset value of this register is UNKNOWN.
To generate a multi-shot timer with a period of N processor clock cycles, use a RELOAD value of N-1. For example, if the SysTick interrupt is required every 100 clock pulses, set RELOAD to 99.

You can read this register and get syst_rvr::R. You can reset, write, write_with_zero this register using syst_rvr::W. You can also modify this register. See API.

Trait Implementations

impl RegisterSpec for SYST_RVR_SPEC

type Ux = u32

Raw register type (u8, u16, u32, …).

impl Resettable for SYST_RVR_SPEC

reset() method sets SYST_RVR to value 0

const RESET_VALUE: u32 = 0u32

Reset value of the register.

fn reset_value() -> Self::Ux

Reset value of the register.

impl Writable for SYST_RVR_SPEC

write(|w| ..) method takes syst_rvr::W writer structure

const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0u32

Specifies the register bits that are not changed if you pass 1 and are changed if you pass 0

const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0u32

Specifies the register bits that are not changed if you pass 0 and are changed if you pass 1

impl Readable for SYST_RVR_SPEC

read() method returns syst_rvr::R reader structure