Type Alias rp2040_pac::ppb::icsr::W

pub type W = W<ICSR_SPEC>;

Register ICSR writer

Aliased Type

struct W { /* private fields */ }

Implementations

impl W

pub fn pendstclr(&mut self) -> PENDSTCLR_W<'_, ICSR_SPEC>

Bit 25 - SysTick exception clear-pending bit.
Write:
0 = No effect.
1 = Removes the pending state from the SysTick exception.
This bit is WO. On a register read its value is Unknown.

pub fn pendstset(&mut self) -> PENDSTSET_W<'_, ICSR_SPEC>

Bit 26 - SysTick exception set-pending bit.
Write:
0 = No effect.
1 = Changes SysTick exception state to pending.
Read:
0 = SysTick exception is not pending.
1 = SysTick exception is pending.

pub fn pendsvclr(&mut self) -> PENDSVCLR_W<'_, ICSR_SPEC>

Bit 27 - PendSV clear-pending bit.
Write:
0 = No effect.
1 = Removes the pending state from the PendSV exception.

pub fn pendsvset(&mut self) -> PENDSVSET_W<'_, ICSR_SPEC>

Bit 28 - PendSV set-pending bit.
Write:
0 = No effect.
1 = Changes PendSV exception state to pending.
Read:
0 = PendSV exception is not pending.
1 = PendSV exception is pending.
Writing 1 to this bit is the only way to set the PendSV exception state to pending.

pub fn nmipendset(&mut self) -> NMIPENDSET_W<'_, ICSR_SPEC>

Bit 31 - Setting this bit will activate an NMI. Since NMI is the highest priority exception, it will activate as soon as it is registered.
NMI set-pending bit.
Write:
0 = No effect.
1 = Changes NMI exception state to pending.
Read:
0 = NMI exception is not pending.
1 = NMI exception is pending.
Because NMI is the highest-priority exception, normally the processor enters the NMI
exception handler as soon as it detects a write of 1 to this bit. Entering the handler then clears
this bit to 0. This means a read of this bit by the NMI exception handler returns 1 only if the
NMI signal is reasserted while the processor is executing that handler.

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Safety

Passing incorrect value can cause undefined behaviour. See reference manual