Type Alias rp2040_pac::pio0::sm::sm_shiftctrl::W

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pub type W = W<SM_SHIFTCTRL_SPEC>;
Expand description

Register SM_SHIFTCTRL writer

Aliased Type§

struct W { /* private fields */ }

Implementations§

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impl W

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pub fn autopush(&mut self) -> AUTOPUSH_W<'_, SM_SHIFTCTRL_SPEC>

Bit 16 - Push automatically when the input shift register is filled, i.e. on an IN instruction which causes the input shift counter to reach or exceed PUSH_THRESH.

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pub fn autopull(&mut self) -> AUTOPULL_W<'_, SM_SHIFTCTRL_SPEC>

Bit 17 - Pull automatically when the output shift register is emptied, i.e. on or following an OUT instruction which causes the output shift counter to reach or exceed PULL_THRESH.

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pub fn in_shiftdir(&mut self) -> IN_SHIFTDIR_W<'_, SM_SHIFTCTRL_SPEC>

Bit 18 - 1 = shift input shift register to right (data enters from left). 0 = to left.

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pub fn out_shiftdir(&mut self) -> OUT_SHIFTDIR_W<'_, SM_SHIFTCTRL_SPEC>

Bit 19 - 1 = shift out of output shift register to right. 0 = to left.

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pub fn push_thresh(&mut self) -> PUSH_THRESH_W<'_, SM_SHIFTCTRL_SPEC>

Bits 20:24 - Number of bits shifted into ISR before autopush, or conditional push (PUSH IFFULL), will take place.
Write 0 for value of 32.

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pub fn pull_thresh(&mut self) -> PULL_THRESH_W<'_, SM_SHIFTCTRL_SPEC>

Bits 25:29 - Number of bits shifted out of OSR before autopull, or conditional pull (PULL IFEMPTY), will take place.
Write 0 for value of 32.

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pub fn fjoin_tx(&mut self) -> FJOIN_TX_W<'_, SM_SHIFTCTRL_SPEC>

Bit 30 - When 1, TX FIFO steals the RX FIFO’s storage, and becomes twice as deep.
RX FIFO is disabled as a result (always reads as both full and empty).
FIFOs are flushed when this bit is changed.

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pub fn fjoin_rx(&mut self) -> FJOIN_RX_W<'_, SM_SHIFTCTRL_SPEC>

Bit 31 - When 1, RX FIFO steals the TX FIFO’s storage, and becomes twice as deep.
TX FIFO is disabled as a result (always reads as both full and empty).
FIFOs are flushed when this bit is changed.

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pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

§Safety

Passing incorrect value can cause undefined behaviour. See reference manual