Struct rp2040_pac::i2c0::ic_tar::IC_TAR_SPEC

pub struct IC_TAR_SPEC;

I2C Target Address Register

This register is 12 bits wide, and bits 31:12 are reserved. This register can be written to only when IC_ENABLE[0] is set to 0.

Note: If the software or application is aware that the DW_apb_i2c is not using the TAR address for the pending commands in the Tx FIFO, then it is possible to update the TAR address even while the Tx FIFO has entries (IC_STATUS[2]= 0). - It is not necessary to perform any write to this register if DW_apb_i2c is enabled as an I2C slave only.

You can read this register and get ic_tar::R. You can reset, write, write_with_zero this register using ic_tar::W. You can also modify this register. See API.

Trait Implementations

impl RegisterSpec for IC_TAR_SPEC

type Ux = u32

Raw register type (u8, u16, u32, …).

impl Resettable for IC_TAR_SPEC

reset() method sets IC_TAR to value 0x55

const RESET_VALUE: u32 = 85u32

Reset value of the register.

fn reset_value() -> Self::Ux

Reset value of the register.

impl Writable for IC_TAR_SPEC

write(|w| ..) method takes ic_tar::W writer structure

const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0u32

Specifies the register bits that are not changed if you pass 1 and are changed if you pass 0

const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0u32

Specifies the register bits that are not changed if you pass 0 and are changed if you pass 1

impl Readable for IC_TAR_SPEC

read() method returns ic_tar::R reader structure