Struct rp2040_pac::i2c0::ic_sda_hold::IC_SDA_HOLD_SPEC

pub struct IC_SDA_HOLD_SPEC;

I2C SDA Hold Time Length Register

The bits [15:0] of this register are used to control the hold time of SDA during transmit in both slave and master mode (after SCL goes from HIGH to LOW).

The bits [23:16] of this register are used to extend the SDA transition (if any) whenever SCL is HIGH in the receiver in either master or slave mode.

Writes to this register succeed only when IC_ENABLE[0]=0.

The values in this register are in units of ic_clk period. The value programmed in IC_SDA_TX_HOLD must be greater than the minimum hold time in each mode (one cycle in master mode, seven cycles in slave mode) for the value to be implemented.

The programmed SDA hold time during transmit (IC_SDA_TX_HOLD) cannot exceed at any time the duration of the low part of scl. Therefore the programmed value cannot be larger than N_SCL_LOW-2, where N_SCL_LOW is the duration of the low part of the scl period measured in ic_clk cycles.

You can read this register and get ic_sda_hold::R. You can reset, write, write_with_zero this register using ic_sda_hold::W. You can also modify this register. See API.

Trait Implementations

impl RegisterSpec for IC_SDA_HOLD_SPEC

type Ux = u32

Raw register type (u8, u16, u32, …).

impl Resettable for IC_SDA_HOLD_SPEC

reset() method sets IC_SDA_HOLD to value 0x01

const RESET_VALUE: u32 = 1u32

Reset value of the register.

fn reset_value() -> Self::Ux

Reset value of the register.

impl Writable for IC_SDA_HOLD_SPEC

write(|w| ..) method takes ic_sda_hold::W writer structure

const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0u32

Specifies the register bits that are not changed if you pass 1 and are changed if you pass 0

const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0u32

Specifies the register bits that are not changed if you pass 0 and are changed if you pass 1

impl Readable for IC_SDA_HOLD_SPEC

read() method returns ic_sda_hold::R reader structure