Struct rp2040_pac::dma::n_channels::N_CHANNELS_SPEC

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pub struct N_CHANNELS_SPEC;
Expand description

The number of channels this DMA instance is equipped with. This DMA supports up to 16 hardware channels, but can be configured with as few as one, to minimise silicon area.

You can read this register and get n_channels::R. See API.

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impl RegisterSpec for N_CHANNELS_SPEC

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type Ux = u32

Raw register type (u8, u16, u32, …).
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impl Resettable for N_CHANNELS_SPEC

reset() method sets N_CHANNELS to value 0

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const RESET_VALUE: u32 = 0u32

Reset value of the register.
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fn reset_value() -> Self::Ux

Reset value of the register.
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impl Readable for N_CHANNELS_SPEC

read() method returns n_channels::R reader structure

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