Type Alias rp2040_pac::clocks::CLK_SYS_SELECTED

pub type CLK_SYS_SELECTED = Reg<CLK_SYS_SELECTED_SPEC>;

CLK_SYS_SELECTED (r) register accessor: Indicates which SRC is currently selected by the glitchless mux (one-hot).
The glitchless multiplexer does not switch instantaneously (to avoid glitches), so software should poll this register to wait for the switch to complete. This register contains one decoded bit for each of the clock sources enumerated in the CTRL SRC field. At most one of these bits will be set at any time, indicating that clock is currently present at the output of the glitchless mux. Whilst switching is in progress, this register may briefly show all-0s.

You can read this register and get clk_sys_selected::R. See API.

For information about available fields see clk_sys_selected module

Aliased Type

struct CLK_SYS_SELECTED { /* private fields */ }