Type Alias rp2040_pac::clocks::CLK_PERI_SELECTED

pub type CLK_PERI_SELECTED = Reg<CLK_PERI_SELECTED_SPEC>;

CLK_PERI_SELECTED (r) register accessor: Indicates which SRC is currently selected by the glitchless mux (one-hot).
This slice does not have a glitchless mux (only the AUX_SRC field is present, not SRC) so this register is hardwired to 0x1.

You can read this register and get clk_peri_selected::R. See API.

For information about available fields see clk_peri_selected module

Aliased Type

struct CLK_PERI_SELECTED { /* private fields */ }