Struct imxrt_ral::usb::RegisterBlock

source ·
#[repr(C)]
pub struct RegisterBlock {
Show 38 fields pub ID: RORegister<u32>, pub HWGENERAL: RORegister<u32>, pub HWHOST: RORegister<u32>, pub HWDEVICE: RORegister<u32>, pub HWTXBUF: RORegister<u32>, pub HWRXBUF: RORegister<u32>, pub GPTIMER0LD: RWRegister<u32>, pub GPTIMER0CTRL: RWRegister<u32>, pub GPTIMER1LD: RWRegister<u32>, pub GPTIMER1CTRL: RWRegister<u32>, pub SBUSCFG: RWRegister<u32>, pub CAPLENGTH: RORegister<u8>, pub HCIVERSION: RORegister<u16>, pub HCSPARAMS: RORegister<u32>, pub HCCPARAMS: RORegister<u32>, pub DCIVERSION: RORegister<u16>, pub DCCPARAMS: RORegister<u32>, pub USBCMD: RWRegister<u32>, pub USBSTS: RWRegister<u32>, pub USBINTR: RWRegister<u32>, pub FRINDEX: RWRegister<u32>, pub DEVICEADDR: RWRegister<u32>, pub ASYNCLISTADDR: RWRegister<u32>, pub BURSTSIZE: RWRegister<u32>, pub TXFILLTUNING: RWRegister<u32>, pub ENDPTNAK: RWRegister<u32>, pub ENDPTNAKEN: RWRegister<u32>, pub CONFIGFLAG: RORegister<u32>, pub PORTSC1: RWRegister<u32>, pub OTGSC: RWRegister<u32>, pub USBMODE: RWRegister<u32>, pub ENDPTSETUPSTAT: RWRegister<u32>, pub ENDPTPRIME: RWRegister<u32>, pub ENDPTFLUSH: RWRegister<u32>, pub ENDPTSTAT: RWRegister<u32>, pub ENDPTCOMPLETE: RWRegister<u32>, pub ENDPTCTRL0: RWRegister<u32>, pub ENDPTCTRL: [RWRegister<u32>; 7], /* private fields */
}
Expand description

USB

Fields§

§ID: RORegister<u32>

Identification register

§HWGENERAL: RORegister<u32>

Hardware General

§HWHOST: RORegister<u32>

Host Hardware Parameters

§HWDEVICE: RORegister<u32>

Device Hardware Parameters

§HWTXBUF: RORegister<u32>

TX Buffer Hardware Parameters

§HWRXBUF: RORegister<u32>

RX Buffer Hardware Parameters

§GPTIMER0LD: RWRegister<u32>

General Purpose Timer #0 Load

§GPTIMER0CTRL: RWRegister<u32>

General Purpose Timer #0 Controller

§GPTIMER1LD: RWRegister<u32>

General Purpose Timer #1 Load

§GPTIMER1CTRL: RWRegister<u32>

General Purpose Timer #1 Controller

§SBUSCFG: RWRegister<u32>

System Bus Config

§CAPLENGTH: RORegister<u8>

Capability Registers Length

§HCIVERSION: RORegister<u16>

Host Controller Interface Version

§HCSPARAMS: RORegister<u32>

Host Controller Structural Parameters

§HCCPARAMS: RORegister<u32>

Host Controller Capability Parameters

§DCIVERSION: RORegister<u16>

Device Controller Interface Version

§DCCPARAMS: RORegister<u32>

Device Controller Capability Parameters

§USBCMD: RWRegister<u32>

USB Command Register

§USBSTS: RWRegister<u32>

USB Status Register

§USBINTR: RWRegister<u32>

Interrupt Enable Register

§FRINDEX: RWRegister<u32>

USB Frame Index

§DEVICEADDR: RWRegister<u32>

Device Address

§ASYNCLISTADDR: RWRegister<u32>

Next Asynch. Address

§BURSTSIZE: RWRegister<u32>

Programmable Burst Size

§TXFILLTUNING: RWRegister<u32>

TX FIFO Fill Tuning

§ENDPTNAK: RWRegister<u32>

Endpoint NAK

§ENDPTNAKEN: RWRegister<u32>

Endpoint NAK Enable

§CONFIGFLAG: RORegister<u32>

Configure Flag Register

§PORTSC1: RWRegister<u32>

Port Status & Control

§OTGSC: RWRegister<u32>

On-The-Go Status & control

§USBMODE: RWRegister<u32>

USB Device Mode

§ENDPTSETUPSTAT: RWRegister<u32>

Endpoint Setup Status

§ENDPTPRIME: RWRegister<u32>

Endpoint Prime

§ENDPTFLUSH: RWRegister<u32>

Endpoint Flush

§ENDPTSTAT: RWRegister<u32>

Endpoint Status

§ENDPTCOMPLETE: RWRegister<u32>

Endpoint Complete

§ENDPTCTRL0: RWRegister<u32>

Endpoint Control0

§ENDPTCTRL: [RWRegister<u32>; 7]

Endpoint Control

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