Struct imxrt_ral::pmu::RegisterBlock

source · 
#[repr(C)]
pub struct RegisterBlock {
Show 28 fields
    pub REG_1P1: RWRegister<u32>,
    pub REG_1P1_SET: RWRegister<u32>,
    pub REG_1P1_CLR: RWRegister<u32>,
    pub REG_1P1_TOG: RWRegister<u32>,
    pub REG_3P0: RWRegister<u32>,
    pub REG_3P0_SET: RWRegister<u32>,
    pub REG_3P0_CLR: RWRegister<u32>,
    pub REG_3P0_TOG: RWRegister<u32>,
    pub REG_2P5: RWRegister<u32>,
    pub REG_2P5_SET: RWRegister<u32>,
    pub REG_2P5_CLR: RWRegister<u32>,
    pub REG_2P5_TOG: RWRegister<u32>,
    pub REG_CORE: RWRegister<u32>,
    pub REG_CORE_SET: RWRegister<u32>,
    pub REG_CORE_CLR: RWRegister<u32>,
    pub REG_CORE_TOG: RWRegister<u32>,
    pub MISC0: RWRegister<u32>,
    pub MISC0_SET: RWRegister<u32>,
    pub MISC0_CLR: RWRegister<u32>,
    pub MISC0_TOG: RWRegister<u32>,
    pub MISC1: RWRegister<u32>,
    pub MISC1_SET: RWRegister<u32>,
    pub MISC1_CLR: RWRegister<u32>,
    pub MISC1_TOG: RWRegister<u32>,
    pub MISC2: RWRegister<u32>,
    pub MISC2_SET: RWRegister<u32>,
    pub MISC2_CLR: RWRegister<u32>,
    pub MISC2_TOG: RWRegister<u32>,
    /* private fields */

}
Expand description

PMU

Fields§

§REG_1P1: RWRegister<u32>

Regulator 1P1 Register

§REG_1P1_SET: RWRegister<u32>

Regulator 1P1 Register

§REG_1P1_CLR: RWRegister<u32>

Regulator 1P1 Register

§REG_1P1_TOG: RWRegister<u32>

Regulator 1P1 Register

§REG_3P0: RWRegister<u32>

Regulator 3P0 Register

§REG_3P0_SET: RWRegister<u32>

Regulator 3P0 Register

§REG_3P0_CLR: RWRegister<u32>

Regulator 3P0 Register

§REG_3P0_TOG: RWRegister<u32>

Regulator 3P0 Register

§REG_2P5: RWRegister<u32>

Regulator 2P5 Register

§REG_2P5_SET: RWRegister<u32>

Regulator 2P5 Register

§REG_2P5_CLR: RWRegister<u32>

Regulator 2P5 Register

§REG_2P5_TOG: RWRegister<u32>

Regulator 2P5 Register

§REG_CORE: RWRegister<u32>

Digital Regulator Core Register

§REG_CORE_SET: RWRegister<u32>

Digital Regulator Core Register

§REG_CORE_CLR: RWRegister<u32>

Digital Regulator Core Register

§REG_CORE_TOG: RWRegister<u32>

Digital Regulator Core Register

§MISC0: RWRegister<u32>

Miscellaneous Register 0

§MISC0_SET: RWRegister<u32>

Miscellaneous Register 0

§MISC0_CLR: RWRegister<u32>

Miscellaneous Register 0

§MISC0_TOG: RWRegister<u32>

Miscellaneous Register 0

§MISC1: RWRegister<u32>

Miscellaneous Register 1

§MISC1_SET: RWRegister<u32>

Miscellaneous Register 1

§MISC1_CLR: RWRegister<u32>

Miscellaneous Register 1

§MISC1_TOG: RWRegister<u32>

Miscellaneous Register 1

§MISC2: RWRegister<u32>

Miscellaneous Control Register

§MISC2_SET: RWRegister<u32>

Miscellaneous Control Register

§MISC2_CLR: RWRegister<u32>

Miscellaneous Control Register

§MISC2_TOG: RWRegister<u32>

Miscellaneous Control Register

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