Module imxrt_ral::lpuart::FIFO::RXIDEN::RW

source ·

Constants§

  • RXIDEN_0
    Disable RDRF assertion due to partially filled FIFO when receiver is idle.
  • RXIDEN_1
    Enable RDRF assertion due to partially filled FIFO when receiver is idle for 1 character.
  • RXIDEN_2
    Enable RDRF assertion due to partially filled FIFO when receiver is idle for 2 characters.
  • RXIDEN_3
    Enable RDRF assertion due to partially filled FIFO when receiver is idle for 4 characters.
  • RXIDEN_4
    Enable RDRF assertion due to partially filled FIFO when receiver is idle for 8 characters.
  • RXIDEN_5
    Enable RDRF assertion due to partially filled FIFO when receiver is idle for 16 characters.
  • RXIDEN_6
    Enable RDRF assertion due to partially filled FIFO when receiver is idle for 32 characters.
  • RXIDEN_7
    Enable RDRF assertion due to partially filled FIFO when receiver is idle for 64 characters.