Constant imxrt_ral::flexspi::MCR2::SCKBDIFFOPT::RW::SCKBDIFFOPT_1

pub const SCKBDIFFOPT_1: u32 = 0x01;

B_SCLK pad is used as port A SCLK inverted clock output (Differential clock to A_SCLK). Port B flash access is not available.