Struct imxrt_ral::adc_etc::RegisterBlock

source ·
#[repr(C)]
pub struct RegisterBlock {
Show 44 fields pub CTRL: RWRegister<u32>, pub DONE0_1_IRQ: RWRegister<u32>, pub DONE2_ERR_IRQ: RWRegister<u32>, pub DMA_CTRL: RWRegister<u32>, pub TRIG0_CTRL: RWRegister<u32>, pub TRIG0_COUNTER: RWRegister<u32>, pub TRIG0_CHAIN_1_0: RWRegister<u32>, pub TRIG0_CHAIN_3_2: RWRegister<u32>, pub TRIG0_CHAIN_5_4: RWRegister<u32>, pub TRIG0_CHAIN_7_6: RWRegister<u32>, pub TRIG0_RESULT_1_0: RORegister<u32>, pub TRIG0_RESULT_3_2: RORegister<u32>, pub TRIG0_RESULT_5_4: RORegister<u32>, pub TRIG0_RESULT_7_6: RORegister<u32>, pub TRIG1_CTRL: RWRegister<u32>, pub TRIG1_COUNTER: RWRegister<u32>, pub TRIG1_CHAIN_1_0: RWRegister<u32>, pub TRIG1_CHAIN_3_2: RWRegister<u32>, pub TRIG1_CHAIN_5_4: RWRegister<u32>, pub TRIG1_CHAIN_7_6: RWRegister<u32>, pub TRIG1_RESULT_1_0: RORegister<u32>, pub TRIG1_RESULT_3_2: RORegister<u32>, pub TRIG1_RESULT_5_4: RORegister<u32>, pub TRIG1_RESULT_7_6: RORegister<u32>, pub TRIG2_CTRL: RWRegister<u32>, pub TRIG2_COUNTER: RWRegister<u32>, pub TRIG2_CHAIN_1_0: RWRegister<u32>, pub TRIG2_CHAIN_3_2: RWRegister<u32>, pub TRIG2_CHAIN_5_4: RWRegister<u32>, pub TRIG2_CHAIN_7_6: RWRegister<u32>, pub TRIG2_RESULT_1_0: RORegister<u32>, pub TRIG2_RESULT_3_2: RORegister<u32>, pub TRIG2_RESULT_5_4: RORegister<u32>, pub TRIG2_RESULT_7_6: RORegister<u32>, pub TRIG3_CTRL: RWRegister<u32>, pub TRIG3_COUNTER: RWRegister<u32>, pub TRIG3_CHAIN_1_0: RWRegister<u32>, pub TRIG3_CHAIN_3_2: RWRegister<u32>, pub TRIG3_CHAIN_5_4: RWRegister<u32>, pub TRIG3_CHAIN_7_6: RWRegister<u32>, pub TRIG3_RESULT_1_0: RORegister<u32>, pub TRIG3_RESULT_3_2: RORegister<u32>, pub TRIG3_RESULT_5_4: RORegister<u32>, pub TRIG3_RESULT_7_6: RORegister<u32>,
}
Expand description

ADC_ETC

Fields§

§CTRL: RWRegister<u32>

ADC_ETC Global Control Register

§DONE0_1_IRQ: RWRegister<u32>

ETC DONE0 and DONE1 IRQ State Register

§DONE2_ERR_IRQ: RWRegister<u32>

ETC DONE_2 and DONE_ERR IRQ State Register

§DMA_CTRL: RWRegister<u32>

ETC DMA control Register

§TRIG0_CTRL: RWRegister<u32>

ETC_TRIG Control Register

§TRIG0_COUNTER: RWRegister<u32>

ETC_TRIG Counter Register

§TRIG0_CHAIN_1_0: RWRegister<u32>

ETC_TRIG Chain 0/1 Register

§TRIG0_CHAIN_3_2: RWRegister<u32>

ETC_TRIG Chain 2/3 Register

§TRIG0_CHAIN_5_4: RWRegister<u32>

ETC_TRIG Chain 4/5 Register

§TRIG0_CHAIN_7_6: RWRegister<u32>

ETC_TRIG Chain 6/7 Register

§TRIG0_RESULT_1_0: RORegister<u32>

ETC_TRIG Result Data 1/0 Register

§TRIG0_RESULT_3_2: RORegister<u32>

ETC_TRIG Result Data 3/2 Register

§TRIG0_RESULT_5_4: RORegister<u32>

ETC_TRIG Result Data 5/4 Register

§TRIG0_RESULT_7_6: RORegister<u32>

ETC_TRIG Result Data 7/6 Register

§TRIG1_CTRL: RWRegister<u32>

ETC_TRIG Control Register

§TRIG1_COUNTER: RWRegister<u32>

ETC_TRIG Counter Register

§TRIG1_CHAIN_1_0: RWRegister<u32>

ETC_TRIG Chain 0/1 Register

§TRIG1_CHAIN_3_2: RWRegister<u32>

ETC_TRIG Chain 2/3 Register

§TRIG1_CHAIN_5_4: RWRegister<u32>

ETC_TRIG Chain 4/5 Register

§TRIG1_CHAIN_7_6: RWRegister<u32>

ETC_TRIG Chain 6/7 Register

§TRIG1_RESULT_1_0: RORegister<u32>

ETC_TRIG Result Data 1/0 Register

§TRIG1_RESULT_3_2: RORegister<u32>

ETC_TRIG Result Data 3/2 Register

§TRIG1_RESULT_5_4: RORegister<u32>

ETC_TRIG Result Data 5/4 Register

§TRIG1_RESULT_7_6: RORegister<u32>

ETC_TRIG Result Data 7/6 Register

§TRIG2_CTRL: RWRegister<u32>

ETC_TRIG Control Register

§TRIG2_COUNTER: RWRegister<u32>

ETC_TRIG Counter Register

§TRIG2_CHAIN_1_0: RWRegister<u32>

ETC_TRIG Chain 0/1 Register

§TRIG2_CHAIN_3_2: RWRegister<u32>

ETC_TRIG Chain 2/3 Register

§TRIG2_CHAIN_5_4: RWRegister<u32>

ETC_TRIG Chain 4/5 Register

§TRIG2_CHAIN_7_6: RWRegister<u32>

ETC_TRIG Chain 6/7 Register

§TRIG2_RESULT_1_0: RORegister<u32>

ETC_TRIG Result Data 1/0 Register

§TRIG2_RESULT_3_2: RORegister<u32>

ETC_TRIG Result Data 3/2 Register

§TRIG2_RESULT_5_4: RORegister<u32>

ETC_TRIG Result Data 5/4 Register

§TRIG2_RESULT_7_6: RORegister<u32>

ETC_TRIG Result Data 7/6 Register

§TRIG3_CTRL: RWRegister<u32>

ETC_TRIG Control Register

§TRIG3_COUNTER: RWRegister<u32>

ETC_TRIG Counter Register

§TRIG3_CHAIN_1_0: RWRegister<u32>

ETC_TRIG Chain 0/1 Register

§TRIG3_CHAIN_3_2: RWRegister<u32>

ETC_TRIG Chain 2/3 Register

§TRIG3_CHAIN_5_4: RWRegister<u32>

ETC_TRIG Chain 4/5 Register

§TRIG3_CHAIN_7_6: RWRegister<u32>

ETC_TRIG Chain 6/7 Register

§TRIG3_RESULT_1_0: RORegister<u32>

ETC_TRIG Result Data 1/0 Register

§TRIG3_RESULT_3_2: RORegister<u32>

ETC_TRIG Result Data 3/2 Register

§TRIG3_RESULT_5_4: RORegister<u32>

ETC_TRIG Result Data 5/4 Register

§TRIG3_RESULT_7_6: RORegister<u32>

ETC_TRIG Result Data 7/6 Register

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