cortex_m::peripheral

Struct Peripherals

source 
pub struct Peripherals {
Show 14 fields
    pub CBP: CBP,
    pub CPUID: CPUID,
    pub DCB: DCB,
    pub DWT: DWT,
    pub FPB: FPB,
    pub FPU: FPU,
    pub ICB: ICB,
    pub ITM: ITM,
    pub MPU: MPU,
    pub NVIC: NVIC,
    pub SAU: SAU,
    pub SCB: SCB,
    pub SYST: SYST,
    pub TPIU: TPIU,
    /* private fields */

}
Expand description

Core peripherals

Fields§

§CBP: CBP

Cache and branch predictor maintenance operations. Not available on Armv6-M.

§CPUID: CPUID

CPUID

§DCB: DCB

Debug Control Block

§DWT: DWT

Data Watchpoint and Trace unit

§FPB: FPB

Flash Patch and Breakpoint unit. Not available on Armv6-M.

§FPU: FPU

Floating Point Unit.

§ICB: ICB

Implementation Control Block.

The name is from the v8-M spec, but the block existed in earlier revisions, without a name.

§ITM: ITM

Instrumentation Trace Macrocell. Not available on Armv6-M and Armv8-M Baseline.

§MPU: MPU

Memory Protection Unit

§NVIC: NVIC

Nested Vector Interrupt Controller

§SAU: SAU

Security Attribution Unit

§SCB: SCB

System Control Block

§SYST: SYST

SysTick: System Timer

§TPIU: TPIU

Trace Port Interface Unit. Not available on Armv6-M.

Implementations§

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impl Peripherals

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pub fn take() -> Option<Self>

Returns all the core peripherals once

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pub unsafe fn steal() -> Self

Unchecked version of Peripherals::take

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