rp2040_pac::clocks

Type Alias CLK_GPOUT1_DIV

Source
pub type CLK_GPOUT1_DIV = Reg<CLK_GPOUT1_DIV_SPEC>;
Expand description

CLK_GPOUT1_DIV (rw) register accessor: Clock divisor, can be changed on-the-fly

You can read this register and get clk_gpout1_div::R. You can reset, write, write_with_zero this register using clk_gpout1_div::W. You can also modify this register. See API.

For information about available fields see clk_gpout1_div module

Aliased Typeยง

struct CLK_GPOUT1_DIV { /* private fields */ }