Struct cortex_m::peripheral::NVIC

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pub struct NVIC { /* private fields */ }

Expand description

Nested Vector Interrupt Controller

Implementations§

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impl NVIC

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pub fn request(&mut self, interrupt: I)
where I: InterruptNumber,

Request an IRQ in software

Writing a value to the INTID field is the same as manually pending an interrupt by setting the corresponding interrupt bit in an Interrupt Set Pending Register. This is similar to NVIC::pend.

This method is not available on ARMv6-M chips.

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pub fn mask(interrupt: I)
where I: InterruptNumber,

Disables interrupt

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pub unsafe fn unmask(interrupt: I)
where I: InterruptNumber,

Enables interrupt

This function is unsafe because it can break mask-based critical sections

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pub fn get_priority(interrupt: I) -> u8
where I: InterruptNumber,

Returns the NVIC priority of interrupt

NOTE NVIC encodes priority in the highest bits of a byte so values like 1 and 2 map to the same priority. Also for NVIC priorities, a lower value (e.g. 16) has higher priority (urgency) than a larger value (e.g. 32).

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pub fn is_active(interrupt: I) -> bool
where I: InterruptNumber,

Is interrupt active or pre-empted and stacked

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pub fn is_enabled(interrupt: I) -> bool
where I: InterruptNumber,

Checks if interrupt is enabled

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pub fn is_pending(interrupt: I) -> bool
where I: InterruptNumber,

Checks if interrupt is pending

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pub fn pend(interrupt: I)
where I: InterruptNumber,

Forces interrupt into pending state

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pub unsafe fn set_priority(&mut self, interrupt: I, prio: u8)
where I: InterruptNumber,

Sets the “priority” of interrupt to prio

NOTE See get_priority method for an explanation of how NVIC priorities work.

On ARMv6-M, updating an interrupt priority requires a read-modify-write operation. On ARMv7-M, the operation is performed in a single atomic write operation.