Type Alias rp2040_pac::rtc::CLKDIV_M1

pub type CLKDIV_M1 = Reg<CLKDIV_M1_SPEC>;

CLKDIV_M1 (rw) register accessor: Divider minus 1 for the 1 second counter. Safe to change the value when RTC is not enabled.

You can read this register and get clkdiv_m1::R. You can reset, write, write_with_zero this register using clkdiv_m1::W. You can also modify this register. See API.

For information about available fields see clkdiv_m1 module

Aliased Type

struct CLKDIV_M1 { /* private fields */ }