Struct rp2040_pac::dma::ch11_dbg_ctdreq::CH11_DBG_CTDREQ_SPEC

pub struct CH11_DBG_CTDREQ_SPEC;

Read: get channel DREQ counter (i.e. how many accesses the DMA expects it can perform on the peripheral without overflow/underflow. Write any value: clears the counter, and cause channel to re-initiate DREQ handshake.

You can read this register and get ch11_dbg_ctdreq::R. You can reset, write, write_with_zero this register using ch11_dbg_ctdreq::W. You can also modify this register. See API.

Trait Implementations

impl RegisterSpec for CH11_DBG_CTDREQ_SPEC

type Ux = u32

Raw register type (u8, u16, u32, …).

impl Resettable for CH11_DBG_CTDREQ_SPEC

reset() method sets CH11_DBG_CTDREQ to value 0

const RESET_VALUE: u32 = 0u32

Reset value of the register.

fn reset_value() -> Self::Ux

Reset value of the register.

impl Writable for CH11_DBG_CTDREQ_SPEC

write(|w| ..) method takes ch11_dbg_ctdreq::W writer structure

const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0u32

Specifies the register bits that are not changed if you pass 1 and are changed if you pass 0

const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 63u32

Specifies the register bits that are not changed if you pass 0 and are changed if you pass 1

impl Readable for CH11_DBG_CTDREQ_SPEC

read() method returns ch11_dbg_ctdreq::R reader structure