Module rp2040_pac::clocks::clk_adc_selected

Indicates which SRC is currently selected by the glitchless mux (one-hot).
This slice does not have a glitchless mux (only the AUX_SRC field is present, not SRC) so this register is hardwired to 0x1.

Structs

• CLK_ADC_SELECTED_SPEC
  Indicates which SRC is currently selected by the glitchless mux (one-hot).
  This slice does not have a glitchless mux (only the AUX_SRC field is present, not SRC) so this register is hardwired to 0x1.

Type Aliases

• R
  Register CLK_ADC_SELECTED reader