Struct nrf52840_pac::saadc::intenset::W

pub struct W(/* private fields */);

Register INTENSET writer

Implementations

impl W

pub fn started(&mut self) -> STARTED_W<'_, 0>

Bit 0 - Write ‘1’ to enable interrupt for STARTED event

pub fn end(&mut self) -> END_W<'_, 1>

Bit 1 - Write ‘1’ to enable interrupt for END event

pub fn done(&mut self) -> DONE_W<'_, 2>

Bit 2 - Write ‘1’ to enable interrupt for DONE event

pub fn resultdone(&mut self) -> RESULTDONE_W<'_, 3>

Bit 3 - Write ‘1’ to enable interrupt for RESULTDONE event

pub fn calibratedone(&mut self) -> CALIBRATEDONE_W<'_, 4>

Bit 4 - Write ‘1’ to enable interrupt for CALIBRATEDONE event

pub fn stopped(&mut self) -> STOPPED_W<'_, 5>

Bit 5 - Write ‘1’ to enable interrupt for STOPPED event

pub fn ch0limith(&mut self) -> CH0LIMITH_W<'_, 6>

Bit 6 - Write ‘1’ to enable interrupt for CH[0].LIMITH event

pub fn ch0limitl(&mut self) -> CH0LIMITL_W<'_, 7>

Bit 7 - Write ‘1’ to enable interrupt for CH[0].LIMITL event

pub fn ch1limith(&mut self) -> CH1LIMITH_W<'_, 8>

Bit 8 - Write ‘1’ to enable interrupt for CH[1].LIMITH event

pub fn ch1limitl(&mut self) -> CH1LIMITL_W<'_, 9>

Bit 9 - Write ‘1’ to enable interrupt for CH[1].LIMITL event

pub fn ch2limith(&mut self) -> CH2LIMITH_W<'_, 10>

Bit 10 - Write ‘1’ to enable interrupt for CH[2].LIMITH event

pub fn ch2limitl(&mut self) -> CH2LIMITL_W<'_, 11>

Bit 11 - Write ‘1’ to enable interrupt for CH[2].LIMITL event

pub fn ch3limith(&mut self) -> CH3LIMITH_W<'_, 12>

Bit 12 - Write ‘1’ to enable interrupt for CH[3].LIMITH event

pub fn ch3limitl(&mut self) -> CH3LIMITL_W<'_, 13>

Bit 13 - Write ‘1’ to enable interrupt for CH[3].LIMITL event

pub fn ch4limith(&mut self) -> CH4LIMITH_W<'_, 14>

Bit 14 - Write ‘1’ to enable interrupt for CH[4].LIMITH event

pub fn ch4limitl(&mut self) -> CH4LIMITL_W<'_, 15>

Bit 15 - Write ‘1’ to enable interrupt for CH[4].LIMITL event

pub fn ch5limith(&mut self) -> CH5LIMITH_W<'_, 16>

Bit 16 - Write ‘1’ to enable interrupt for CH[5].LIMITH event

pub fn ch5limitl(&mut self) -> CH5LIMITL_W<'_, 17>

Bit 17 - Write ‘1’ to enable interrupt for CH[5].LIMITL event

pub fn ch6limith(&mut self) -> CH6LIMITH_W<'_, 18>

Bit 18 - Write ‘1’ to enable interrupt for CH[6].LIMITH event

pub fn ch6limitl(&mut self) -> CH6LIMITL_W<'_, 19>

Bit 19 - Write ‘1’ to enable interrupt for CH[6].LIMITL event

pub fn ch7limith(&mut self) -> CH7LIMITH_W<'_, 20>

Bit 20 - Write ‘1’ to enable interrupt for CH[7].LIMITH event

pub fn ch7limitl(&mut self) -> CH7LIMITL_W<'_, 21>

Bit 21 - Write ‘1’ to enable interrupt for CH[7].LIMITL event

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Methods from Deref<Target = W<INTENSET_SPEC>>

pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self

Writes raw bits to the register.

Trait Implementations

impl Deref for W

type Target = W<INTENSET_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut Self::Target

Mutably dereferences the value.

impl From<W<INTENSET_SPEC>> for W

fn from(writer: W<INTENSET_SPEC>) -> Self

Converts to this type from the input type.