Struct nrf52840_pac::radio::intenclr::R

pub struct R(/* private fields */);

Register INTENCLR reader

Implementations

impl R

pub fn ready(&self) -> READY_R

Bit 0 - Write ‘1’ to disable interrupt for READY event

pub fn address(&self) -> ADDRESS_R

Bit 1 - Write ‘1’ to disable interrupt for ADDRESS event

pub fn payload(&self) -> PAYLOAD_R

Bit 2 - Write ‘1’ to disable interrupt for PAYLOAD event

pub fn end(&self) -> END_R

Bit 3 - Write ‘1’ to disable interrupt for END event

pub fn disabled(&self) -> DISABLED_R

Bit 4 - Write ‘1’ to disable interrupt for DISABLED event

pub fn devmatch(&self) -> DEVMATCH_R

Bit 5 - Write ‘1’ to disable interrupt for DEVMATCH event

pub fn devmiss(&self) -> DEVMISS_R

Bit 6 - Write ‘1’ to disable interrupt for DEVMISS event

pub fn rssiend(&self) -> RSSIEND_R

Bit 7 - Write ‘1’ to disable interrupt for RSSIEND event

pub fn bcmatch(&self) -> BCMATCH_R

Bit 10 - Write ‘1’ to disable interrupt for BCMATCH event

pub fn crcok(&self) -> CRCOK_R

Bit 12 - Write ‘1’ to disable interrupt for CRCOK event

pub fn crcerror(&self) -> CRCERROR_R

Bit 13 - Write ‘1’ to disable interrupt for CRCERROR event

pub fn framestart(&self) -> FRAMESTART_R

Bit 14 - Write ‘1’ to disable interrupt for FRAMESTART event

pub fn edend(&self) -> EDEND_R

Bit 15 - Write ‘1’ to disable interrupt for EDEND event

pub fn edstopped(&self) -> EDSTOPPED_R

Bit 16 - Write ‘1’ to disable interrupt for EDSTOPPED event

pub fn ccaidle(&self) -> CCAIDLE_R

Bit 17 - Write ‘1’ to disable interrupt for CCAIDLE event

pub fn ccabusy(&self) -> CCABUSY_R

Bit 18 - Write ‘1’ to disable interrupt for CCABUSY event

pub fn ccastopped(&self) -> CCASTOPPED_R

Bit 19 - Write ‘1’ to disable interrupt for CCASTOPPED event

pub fn rateboost(&self) -> RATEBOOST_R

Bit 20 - Write ‘1’ to disable interrupt for RATEBOOST event

pub fn txready(&self) -> TXREADY_R

Bit 21 - Write ‘1’ to disable interrupt for TXREADY event

pub fn rxready(&self) -> RXREADY_R

Bit 22 - Write ‘1’ to disable interrupt for RXREADY event

pub fn mhrmatch(&self) -> MHRMATCH_R

Bit 23 - Write ‘1’ to disable interrupt for MHRMATCH event

pub fn phyend(&self) -> PHYEND_R

Bit 27 - Write ‘1’ to disable interrupt for PHYEND event

Methods from Deref<Target = R<INTENCLR_SPEC>>

pub fn bits(&self) -> REG::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<INTENCLR_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl From<R<INTENCLR_SPEC>> for R

fn from(reader: R<INTENCLR_SPEC>) -> Self

Converts to this type from the input type.