#[repr(C)]pub struct RegisterBlock {Show 24 fields
pub tasks_activate: TASKS_ACTIVATE,
pub tasks_readstart: TASKS_READSTART,
pub tasks_writestart: TASKS_WRITESTART,
pub tasks_erasestart: TASKS_ERASESTART,
pub tasks_deactivate: TASKS_DEACTIVATE,
pub events_ready: EVENTS_READY,
pub inten: INTEN,
pub intenset: INTENSET,
pub intenclr: INTENCLR,
pub enable: ENABLE,
pub read: READ,
pub write: WRITE,
pub erase: ERASE,
pub psel: PSEL,
pub xipoffset: XIPOFFSET,
pub ifconfig0: IFCONFIG0,
pub ifconfig1: IFCONFIG1,
pub status: STATUS,
pub dpmdur: DPMDUR,
pub addrconf: ADDRCONF,
pub cinstrconf: CINSTRCONF,
pub cinstrdat0: CINSTRDAT0,
pub cinstrdat1: CINSTRDAT1,
pub iftiming: IFTIMING,
/* private fields */
}Expand description
Register block
Fields§
§tasks_activate: TASKS_ACTIVATE0x00 - Activate QSPI interface
tasks_readstart: TASKS_READSTART0x04 - Start transfer from external flash memory to internal RAM
tasks_writestart: TASKS_WRITESTART0x08 - Start transfer from internal RAM to external flash memory
tasks_erasestart: TASKS_ERASESTART0x0c - Start external flash memory erase operation
tasks_deactivate: TASKS_DEACTIVATE0x10 - Deactivate QSPI interface
events_ready: EVENTS_READY0x100 - QSPI peripheral is ready. This event will be generated as a response to any QSPI task.
inten: INTEN0x300 - Enable or disable interrupt
intenset: INTENSET0x304 - Enable interrupt
intenclr: INTENCLR0x308 - Disable interrupt
enable: ENABLE0x500 - Enable QSPI peripheral and acquire the pins selected in PSELn registers
read: READ0x504..0x510 - Unspecified
write: WRITE0x510..0x51c - Unspecified
erase: ERASE0x51c..0x524 - Unspecified
psel: PSEL0x524..0x540 - Unspecified
xipoffset: XIPOFFSET0x540 - Address offset into the external memory for Execute in Place operation.
ifconfig0: IFCONFIG00x544 - Interface configuration.
ifconfig1: IFCONFIG10x600 - Interface configuration.
status: STATUS0x604 - Status register.
dpmdur: DPMDUR0x614 - Set the duration required to enter/exit deep power-down mode (DPM).
addrconf: ADDRCONF0x624 - Extended address configuration.
cinstrconf: CINSTRCONF0x634 - Custom instruction configuration register.
cinstrdat0: CINSTRDAT00x638 - Custom instruction data register 0.
cinstrdat1: CINSTRDAT10x63c - Custom instruction data register 1.
iftiming: IFTIMING0x640 - SPI interface timing.