Expand description
SRC Control Register
Modules§
- CORE0_
DBG_ RST - Software reset for core0 debug only
- CORE0_
RST - Software reset for core0 only
- DBG_
RST_ MSK_ PG - Do not assert debug resets after power gating event of core
- LOCKUP_
RST - lockup reset enable bit
- MASK_
WDOG3_ RST - Mask wdog3_rst_b source
- MASK_
WDOG_ RST - Mask wdog_rst_b source