imxrt_ral::flexram::DTCM_MAGIC_ADDR::DTCM_WR_RD_SEL

Module RW

Source

Constants§

DTCM_WR_RD_SEL_0
When DTCM read access hits magic address, it will generate interrupt.
DTCM_WR_RD_SEL_1
When DTCM write access hits magic address, it will generate interrupt.