Constant imxrt_ral::dma::CR::EDBG::RW::EDBG_1

source ยท 
pub const EDBG_1: u32 = 0x01;
Expand description

When in debug mode, the DMA stalls the start of a new channel. Executing channels are allowed to complete. Channel execution resumes when the system exits debug mode or the EDBG bit is cleared.