Module RW

Source

Constants§

FLEXIO1_CLK_SEL_0
derive clock from PLL4 divided clock
FLEXIO1_CLK_SEL_1
derive clock from PLL3 PFD2 clock
FLEXIO1_CLK_SEL_2
derive from PLL2
FLEXIO1_CLK_SEL_3
derive clock from pll3_sw_clk