Trait embedded_hal::blocking::i2c::Transactional

source · 
pub trait Transactional<A: AddressMode = SevenBitAddress> {
    type Error;

    // Required method
    fn exec<'a>(
        &mut self,
        address: A,
        operations: &mut [Operation<'a>],
    ) -> Result<(), Self::Error>;
}
Expand description

Transactional I2C interface.

This allows combining operations within an I2C transaction.

Required Associated Types§

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type Error

Error type

Required Methods§

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fn exec<'a>( &mut self, address: A, operations: &mut [Operation<'a>], ) -> Result<(), Self::Error>

Execute the provided operations on the I2C bus.

Transaction contract:

  • Before executing the first operation an ST is sent automatically. This is followed by SAD+R/W as appropriate.

  • Data from adjacent operations of the same type are sent after each other without an SP or SR.

  • Between adjacent operations of a different type an SR and SAD+R/W is sent.

  • After executing the last operation an SP is sent automatically.

  • If the last operation is a Read the master does not send an acknowledge for the last byte.

  • ST = start condition

  • SAD+R/W = slave address followed by bit 1 to indicate reading or 0 to indicate writing

  • SR = repeated start condition

  • SP = stop condition

Implementors§